1. Field of the Invention
The invention relates to line drivers and line driver circuits. More particularly, the invention relates to programmable amplitude line drivers.
2. Description of the Related Art
A line driver is an amplifier or amplifier circuit that provides and transmits proper signals onto transmission lines. Line drivers extend the useful transmission distance between terminals or stations within a network by controlling the amplitude of the transmitted signals.
High speed data transmitters and other comparable devices generally need a relatively efficient line driver to provide sufficient signal amplitude at the output with sufficiently minimal internal power consumption, in accordance with applicable industry standards. For example, for data transmitters operating at rates of multi-gigabits-per-second, the line driver should provide a relatively wide range of amplitude (e.g., more than 1.5 volts peak-to-peak) at the transmitter output while satisfying other constraints. Such constraints include a relatively well-defined differential and common-mode impedance, a reduced impedance discontinuity during transitions, a relatively well controlled rise and fall time, a relatively well-defined common-mode voltage during all phases of operation, and a reduced skew and asymmetry between differential outputs.
Conventional line drivers typically have one of two configurations: an H-Bridge configuration or a Current Mode Logic (CML) configuration. The H-Bridge configuration includes a quad switch design with amplitude control provided by the tail currents. However, the H-Bridge configuration generally has a relatively undefined common-mode impedance, suffers from differential impedance drops during transitions, and has a timing mismatch due to positive-channel metal-oxide semiconductor (PMOS) and negative-channel metal-oxide semiconductor (NMOS) switches that cause common-mode voltage bounce. Also, the H-Bridge configuration generally needs a relatively large voltage to support current sources and the particular switch arrangement. Furthermore, the H-Bridge configuration has a relatively undefined common mode, which generally can be solved by additional circuitry.
The CML driver includes a dual switch arrangement with amplitude control provided through the tail current. However, the CML driver typically needs a relatively large amount of power, and has an asymmetric rise/fall time.
Accordingly, it would be desirable to have available an improved line driver, for use in high speed data transmitters and other devices, that reduces if not eliminates the previously-mentioned issues associated with conventional line driver configurations.